* OPA655M  operational amplifier "macromodel" subscircuit
* using Multiple pole-zero topology
* created  5/28/96   sb
* Rev.A  7/20/96   BB
*  ------------------------------------------------------------------------ 
* |  NOTICE: THE INFORMATION PROVIDED HEREIN IS BELIEVED TO BE RELIABLE;   |
* |  HOWEVER; BURR-BROWN ASSUMES NO RESPONSIBILITY FOR INACCURACIES OR     |
* |  OMISSIONS.  BURR-BROWN ASSUMES NO RESPONSIBILITY FOR THE USE OF THIS  |
* |  INFORMATION, AND ALL USE OF SUCH INFORMATION SHALL BE ENTIRELY AT     |
* |  THE USER'S OWN RISK.  NO PATENT RIGHTS OR LICENSES TO ANY OF THE      |
* |  CIRCUITS DESCRIBED HEREIN ARE IMPLIED OR GRANTED TO ANY THIRD PARTY.  |
* |  BURR-BROWN DOES NOT AUTHORIZE OR WARRANT ANY BURR-BROWN PRODUCT FOR   |
* |  USE IN LIFE-SUPPORT DEVICES AND/OR SYSTEMS.                           |
*  ------------------------------------------------------------------------ 
* Notes:
* 1. The output stage includes a parasitic capacitance (C5=1pF) from the output
*    node to ground.  
* 2. For better convergence during transient analysis set:
*    .OPTIONS  ITL4=40
*------------------------------------------------
* Node assignments:
*                 -In         
*                 |   +In
*                 |  |  Negative Supply
*                 |  |  |  Output
*                 |  |  |  |  Positive Supply
*                 |  |  |  |  |
.SUBCKT  OPA655M  2  3  4  6  7
*
* Input Stage
R1      1    2   5E11
R2      1    3   5E11
R3      7   15   19.2
R4      7   16   19.2
*2nd POLE at 260MHz
C1     15   16   1.1E-11
ISS    14    4   14E-3
IOS     2    3   2E-12
EOS    12    2   POLY(1)  70  9  0.5E-3  1
J1     15   12   14    JX
J2     16    3   14    JX
*
* Second Stage
R7      7   23   15385
R8      4   23   15385
*1st POLE at 300KHz
C2      7   23   34.5E-12
C3      4   23   34.5E-12
G1      7   23   POLY(1) 15  16  10E-3  0.052
G2     23    4   POLY(1) 16  15  10E-3  0.052
V1      7    8   0.5V
V2     10    4   0.5V
D1     23    8   DX
D2     10   23   DX
R9      7    9   1E4
R10     9    4   1E4
* 
*Pole at 800MHz
R11     7    20  1E6
R12    20     4  1E6
C11     7    20  0.2E-16
C12    20     4  0.2E-16
G3      7    20  23   9   1E-6
G4     20     4   9  23   1E-6
*
*Pole at 2.5GHz
R30    7     30  1E6
R31    4     30  1E6
C30    7     30  6.3E-17
C31    4     30  6.3E-17
G30    7     30  20   9  1E-6
G31   30      4   9  20  1E-6
*
*Common Mode Stage
R19    71   70   1E6
R20    70   72   1E6
L3      7   71   0.851
L4     72    4   0.851
G7      7   70   1   9   5.623E-10
G8     70    4   9   1   5.623E-10
*
*Pole at 1500MHz
R21     7   80   1E6
R22     4   80   1E6
C21     7   80   1.1E-16
C22     4   80   1.1E-16
G9      7   80   20    9   1E-6
G10     80   4    9   20   1E-6
*
*Output Stage
R23     7   81   64
R24    81    4   64
L5     81   88   1.8E-9
R5     88    6   1
C5     6     0   1E-12
G11    81    7    7   80  1.5625E-2
G12     4   81   80    4  1.5625E-2
G13    84    4   80   81  1.5625E-2
G14    85    4   81   80  1.5625E-2
V3     82   81   1.64
V4     81   83   1.64
D3     80   82   DX
D4     83   80   DX
D5      7   84   DX
D6      7   85   DX
D7      4   84   DY
D8      4   85   DY
*
.MODEL JX  NJF(BETA=0.205  VTO=-1.55  IS=2.5E-12  CGD=5E-13 AF=3.5   KF=8E-10)
.MODEL DX  D(IS=1E-15)
.MODEL DY  D(IS=1E-15  BV=20)
.ENDS